Import xPack OpenOCD 0.12.0-7 and GNU Make 4.4.1 from x86_64-w64-mingw32.

2026-09-14 16:20:05 +08:00
parent 2b73c30a9d
commit 534c017e0f
1133 changed files with 74341 additions and 0 deletions
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+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for Nuvoton NPCX Cortex-M4 Series
+
+# Adapt based on what transport is active.
+source [find target/swj-dp.tcl]
+
+# Set Chipname
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME npcx
+}
+
+# SWD DAP ID of Nuvoton NPCX Cortex-M4.
+if { [info exists CPUDAPID ] } {
+   set _CPUDAPID $CPUDAPID
+} else {
+   set _CPUDAPID 0x4BA00477
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 32kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x8000
+}
+
+if { [info exists FIUNAME]} {
+   set _FIUNAME $FIUNAME
+} else {
+   set _FIUNAME npcx.fiu
+}
+
+# Debug Adapter Target Settings
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x200c0000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# Initial JTAG/SWD speed
+# For safety purposes, set for the lowest cpu clock configuration
+# 4MHz / 6 = 666KHz, so use 600KHz for it
+adapter speed 600
+
+# For safety purposes, set for the lowest cpu clock configuration
+$_TARGETNAME configure -event reset-start {adapter speed 600}
+
+# use sysresetreq to perform a system reset
+cortex_m reset_config sysresetreq
+
+# flash configuration
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME npcx 0x64000000 0 0 0 $_TARGETNAME $_FIUNAME