Import xPack OpenOCD 0.12.0-7 and GNU Make 4.4.1 from x86_64-w64-mingw32.
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# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Nordic nRF91 series: ARM Cortex-M33, SWD only
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#
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source [find target/swj-dp.tcl]
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source [find mem_helper.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME nrf91
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 16kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x4000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x6ba02477
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}
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swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
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# Contrary to the product specification at least nRF9161 supports multidrop SWD.
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# The instance ID is fixed, no more than one nRF91 can be connected to one SWD bus.
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if { [info exists SWD_MULTIDROP] } {
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -dp-id 0x0090289 -instance-id 0
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} else {
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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# Keep adapter speed less or equal 2000 kHz or flash programming fails!
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adapter speed 1000
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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source [find target/nordic/common.cfg]
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flash bank $_CHIPNAME.flash nrf5 0x00000000 0 0 0 $_TARGETNAME
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flash bank $_CHIPNAME.uicr nrf5 0x00FF8000 0 0 0 $_TARGETNAME
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if { ![using_hla] } {
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$_TARGETNAME cortex_m reset_config sysresetreq
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$_TARGETNAME configure -event examine-fail { _nrf_check_ap_lock 4 3 }
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}
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# Mass erase and unlock the device using proprietary nRF CTRL-AP (AP #4)
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proc nrf91_recover {} {
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_nrf_ctrl_ap_recover 4
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}
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add_help_text nrf91_recover "Mass erase and unlock nRF91 device"
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