Import xPack OpenOCD 0.12.0-7 and GNU Make 4.4.1 from x86_64-w64-mingw32.

2026-09-14 16:20:05 +08:00
parent 2b73c30a9d
commit 534c017e0f
1133 changed files with 74341 additions and 0 deletions
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Freescale i.MX51
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME imx51
+}
+
+# CoreSight Debug Access Port
+if { [info exists DAP_TAPID] } {
+   set _DAP_TAPID $DAP_TAPID
+} else {
+   set _DAP_TAPID 0x1ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \
+        -expected-id $_DAP_TAPID
+
+# SDMA / no IDCODE
+jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x0 -irmask 0xf
+
+# SJC
+if { [info exists SJC_TAPID] } {
+   set _SJC_TAPID SJC_TAPID
+} else {
+   set _SJC_TAPID 0x0190c01d
+}
+
+jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x1 -irmask 0x1f \
+        -expected-id $_SJC_TAPID -ignore-version
+
+# GDB target: Cortex-A8, using DAP
+set _TARGETNAME $_CHIPNAME.cpu
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap
+
+# some TCK tycles are required to activate the DEBUG power domain
+jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
+
+proc imx51_dbginit {target} {
+     # General Cortex-A8 debug initialisation
+     cortex_a dbginit
+}
+
+$_TARGETNAME configure -event reset-assert-post "imx51_dbginit $_TARGETNAME"