Import xPack OpenOCD 0.12.0-7 and GNU Make 4.4.1 from x86_64-w64-mingw32.

2026-09-14 16:20:05 +08:00
parent 2b73c30a9d
commit 534c017e0f
1133 changed files with 74341 additions and 0 deletions
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+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Intel Cyclone 5 FPGA
+# see Cyclone V Device Handbook
+# Table 9-1: IDCODE Information for Cyclone V Devices
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME cyclonev
+}
+
+array set _CYCLONE_5_DATA {
+  0x02b150dd { 864 163 5CEA2}
+  0x02d020dd {1485  19 5CSEA6_5CSXC6_5CSTD6}
+  0x02b040dd {1728  -1 5CGXC9_5CGTD9}
+  0x02b050dd { 864 163 5CEA4}
+  0x02b030dd {1488  19 5CGXC7_5CGTD7}
+  0x02d120dd {1485  -1 5CSEA5_5CSXC5_5CSTD5}
+  0x02b220dd {1104  19 5CEA5}
+  0x02b020dd {1104  19 5CGXC5_5CGTD5}
+  0x02d010dd {1197  -1 5CSEA4_5CSXC4}
+  0x02b120dd {1104  19 5CGXC4}
+  0x02b140dd {1728  -1 5CEA9}
+  0x02b010dd { 720  19 5CGXC3}
+  0x02b130dd {1488  19 5CEA7}
+  0x02d110dd {1197  -1 5CSEA2_5CSXC2}
+}
+
+set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
+foreach id [array names _CYCLONE_5_DATA] {
+  set cmd [concat "-expected-id" id]
+}
+eval $jtag_newtap_cmd
+
+source [find fpga/altera_common_init.cfg]
+
+pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cyclonev
+jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_5_DATA}"