Import xPack OpenOCD 0.12.0-7 and GNU Make 4.4.1 from x86_64-w64-mingw32.

Tools/xpack-openocd-0.12.0-7/openocd/scripts/board/digilent_anvyl.cfg

@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Digilent Anvyl with Xilinx Spartan-6 FPGA
+# https://digilent.com/reference/programmable-logic/anvyl/start
+# Almost the same setup as the Digilent Nexys Video board or the Digilent HS1
+# adapter.
+adapter driver ftdi
+adapter speed 30000
+
+ftdi device_desc "Digilent USB Device"
+ftdi vid_pid 0x0403 0x6010
+
+# channel 0 is the JTAG channel
+# channel 1 is a user serial channel to pins on the FPGA
+ftdi channel 0
+
+# just TCK TDI TDO TMS, no reset
+ftdi layout_init 0x0088 0x008b
+reset_config none
+
+# Enable sampling on falling edge for high JTAG speeds.
+ftdi tdo_sample_edge falling
+
+transport select jtag
+
+source [find cpld/xilinx-xc6s.cfg]
+source [find cpld/jtagspi.cfg]