Changed the content pointer registered by Register_Package() method to const type && Added three logic gate nodes, now supporting AND, OR, NOT operations. More controlled or conditional type nodes will be added later && Improved the workflow packet passing execution process among existing connectors.

Inc/Nodes_And_Connectors.hpp

@@ -67,7 +67,7 @@ public:
      * @param count             当前包位置
      * @param total_count       包流总长度
      */
-    virtual bool Register_Package(void *p_content, size_t content_size, size_t count, size_t total_count);
+    virtual bool Register_Package(const void *p_content, size_t content_size, size_t count, size_t total_count);
 
     // 获取包
     virtual const Package Get_Package(void);
@@ -99,6 +99,9 @@ public:
         NODE_TYPE_CONNECTOR_TEST, // 接口测试节点
         NODE_TYPE_MSG_LINE_INPUT, // 消息输入节点
         NODE_TYPE_FILTER,         // 筛选器节点
+        NODE_TYPE_LOGIC_AND,      // 逻辑与门节点
+        NODE_TYPE_LOGIC_OR,       // 逻辑或门节点
+        NODE_TYPE_LOGIC_NOT,      // 逻辑非门节点
         NODE_TYPE_CSV_EXPORTER,   // CSV输出节点
     } Node_Type_Enum;             // 节点类型枚举
 
@@ -303,4 +306,70 @@ public:
     virtual bool Execute_Process(void);
 };
 
+// 逻辑与门
+class Logic_AND_Node : public Abs_Node
+{
+private:
+    float node_width = 0;
+
+public:
+    // 显式禁用默认构造
+    Logic_AND_Node() = delete;
+
+    // 必要构造
+    Logic_AND_Node(Independent_ID_Generator *Node_ID_Generator,
+                   Independent_ID_Generator *Connector_ID_Generator,
+                   ImVec2 initial_position = ImVec2(0, 0));
+
+    // 绘制节点
+    virtual void Show(void);
+
+    // 执行处理流程
+    virtual bool Execute_Process(void);
+};
+
+// 逻辑与门
+class Logic_OR_Node : public Abs_Node
+{
+private:
+    float node_width = 0;
+
+public:
+    // 显式禁用默认构造
+    Logic_OR_Node() = delete;
+
+    // 必要构造
+    Logic_OR_Node(Independent_ID_Generator *Node_ID_Generator,
+                  Independent_ID_Generator *Connector_ID_Generator,
+                  ImVec2 initial_position = ImVec2(0, 0));
+
+    // 绘制节点
+    virtual void Show(void);
+
+    // 执行处理流程
+    virtual bool Execute_Process(void);
+};
+
+// 逻辑与门
+class Logic_NOT_Node : public Abs_Node
+{
+private:
+    float node_width = 0;
+
+public:
+    // 显式禁用默认构造
+    Logic_NOT_Node() = delete;
+
+    // 必要构造
+    Logic_NOT_Node(Independent_ID_Generator *Node_ID_Generator,
+                   Independent_ID_Generator *Connector_ID_Generator,
+                   ImVec2 initial_position = ImVec2(0, 0));
+
+    // 绘制节点
+    virtual void Show(void);
+
+    // 执行处理流程
+    virtual bool Execute_Process(void);
+};
+
 #endif